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What are the next-generation chip technologies for charging pile motherboards?

The next-generation charging pile motherboard chip technology has moved beyond the stage of "single MCU dominance," evolving into a heterogeneous integration trend combining "power devices + real-time control + AI + security + communication" into a five-in-one solution. Based on the latest released and tested data from 2024-2025, the technology can be summarized into the following eight major directions:

1. Third-generation semiconductor power devices are fully integrated into vehicles

  • SiC MOSFET/IGBT Hybrid Packaging: Integrating 1200 V SiC with 650 V Super Junction IGBT into the same module, achieving a switching frequency of 100 kHz+, reducing PFC inductor volume by 40%, and delivering a peak overall efficiency of >96%.

  • GaN Smart Power Stage: For instance, the Yuanxin YX47590 integrates half-bridge driving, current/temperature sensing, and protection into a 5 mm × 6 mm QFN package with propagation delay < 10 ns, suitable for 30-50 kW bidirectional AC/DC applications. A single chip can replace three discrete drivers and six sampling resistors.

2. Heterogeneous Real-Time Control SoC

  • "ARM Cortex-M7 + Programmable Logic" Dual-Core: The M7 runs the charging state machine, while the FPGA hard logic implements a 50 kHz current loop with a control cycle of <10 µs, meeting the strict loop delay requirements for 800 V/480 A ultra-fast charging.

  • On-chip integration of a 4-channel 16-bit ADC with differential PGA eliminates the need for external Hall sensors and operational amplifiers, reducing BOM costs by 8% and halving sampling drift.

3. On-chip AI Edge Core (NPU)

  • The 1 TOPS INT8 NPU is integrated into the main control SoC, running models for battery health EIS, charging demand prediction, and dynamic power allocation. AI inference latency is less than 5 ms, with prediction accuracy exceeding 90%, saving 30% of cloud traffic compared to a pure MCU solution.

4. Single-chip bidirectional power supply control

  • A digital power SoC supporting V2G/V2H, integrating Totem-Pole PFC + bidirectional CLLC control within a single chip, with a load-switching time of <20 ms and standby power consumption <0.5 W, enabling the "energy router" function on the charger side.

5. 5 kV Isolated Fully Integrated Digital Interface

  • Isolated CAN/485/ADC Tri-Integrated: Chuantu Micro CA-IS3062W integrates a 5 kV isolated power supply, high-speed isolated channels, and a CAN transceiver, reducing the board area by 60%. With lightning surge immunity of ±8 kV, it meets the mandatory isolation requirements of the new 2025 national standard.

6. Quantum-resistant Secure Encryption Unit

  • On-chip Dual TEE Architecture + National Cryptography SM9/Post-Quantum Algorithm Hardware Accelerator, achieving <50 ms for桩-车-网 identity authentication, preventing Man-in-the-Middle spoofing of charging commands, and providing chip-level trusted root for Plug & Charge.

7. Submillisecond Protection Trigger

  • The chip-level solution (RuiXun Micro) with 0.1 ms-level current closed-loop instantly shuts down the driver upon detecting surges or short circuits, operating 10 times faster than traditional external comparators. It can reduce I²t energy by 85%, significantly minimizing the risk of power device overcurrent damage.

8. High-Frequency Magnetic Integration and Power Stage Packaging

  • "Chip Inductor" Packaging: Integrates the planar transformer/resonant inductor with power bare dies on the same substrate, pushes the switching frequency up to 500 kHz-1 MHz, maintains magnetic component height < 4 mm, and increases overall power density from 15 kW/L to 50 kW/L, meeting the stringent size requirements of urban 480 kW ultra-fast charging cabinets.

summary

  • Xincheng Technology's next-generation charging pile motherboard chip is no longer a single MCU, but a heterogeneous SiP (System-in-Package) combining "power + real-time control + AI + safety + isolated communication." While power devices (SiC/GaN) still dominate the BOM, the addition of AI cores, isolated interfaces, and security encryption units is becoming a key differentiator in competitive differentiation. By adopting these new chips, efficiency (>98%), power density (50 kW/L), response speed (<50 µs), and safety (0.1 ms protection) can achieve generational improvements. Contact us for inquiries and purchases!